The present invention is directed to method and apparatus for forming bonded substrates. More particularly, the invention provides a method and device for forming bonded substrates having small unbounded edge regions. Merely by way of example, techniques in accordance with the invention may be applied to forming bonded silicon wafers, e.g., for SOI (silicon on insulator) device applications. But it would be recognized that the invention has a much broader range of applicability. For example, the invention can be applied to forming bonded substrates for applications in power devices, thin film devices, as well as compound semiconductor devices.
Bonded substrates are widely used in microelectronics fabrication. FIG. 1A is a cross-sectional view diagram illustrating bonded wafers. As shown, wafers 101 and 102 are bonded together by physical or chemical bonding forces. For example, an SOI wafer can be produced by bonding two silicon wafers together. Silicon oxide films are formed on both wafers. The wafers are brought in close contact and bonded together. A heat treatment can be used to increase the bonding strength. One of the wafers can be made thinner by polishing and etching or, alternatively, by cleaving techniques. In some applications, two wafers can be bonded together having a variety of films including nitride, oxide, or even without any film between the silicon wafers.
Bonded substrates can offer certain advantages in device applications. For example, a thin SOI layer can be used as a substrate for fabricating devices requiring low parasitic capacitance/resistance. In other applications, substrate bonding techniques are used to transfer a device layer to a suitable substrate.
Even though bonded substrates find wide applications, conventional substrate bonding techniques often suffer from many limitations. For example, bonded substrates formed using conventional bonding techniques often have relatively large non-bonded regions near the edges of the substrates. FIG. 1B is a magnified cross-sectional view diagram illustrating a periphery portion of bonded wafers 101 and 102 in FIG. 1A. As shown, the edges of wafers 101 and 102 both include polished periphery regions provided by substrate vendors. For example, silicon wafer vendors provide a wafer specification including bevel roll off, which is an indication of the extent of the edge region. An example of the bevel roll-off is shown in FIG. 1B as D1. A typical bevel roll-off region can be about 200 um in length. When two substrates are bonded together, a portion near the periphery remains non-bonded. Conventional methods for substrate bonding suffer from relatively large non-bonded areas at the periphery. As shown as in FIG. 1B, the length of the non-bonded region D2 is substantially greater than the bevel roll-off D1.
This non-bonded area, also known as edge exclusion region, is undesirable for many reasons. For example, the non-bonded edge exclusion region reduces usable area in the bonded substrate. The non-bonded region also tends to weaken the bonded substrate structure. Therefore, damages can occur during subsequent processing. Additionally, particles or contaminants can accumulate near the edge regions.
Various techniques have been proposed for reducing the edge exclusion region of bonded substrates. For example, heat treatment and/or external constrained pressure have been introduced to reduce edge exclusion. These conventional techniques may be effective for some applications, but they tend to involve complicated processes and expensive equipment.
Thus, there is a need for a technique whereby the quality of bonded substrates can be improved while maintaining a simple and cost-effective manufacturing process.